Decoding the Dot: A Deep Dive into Barcode Label Printer Electronics - Extended Section 5 |
Subtitle: Printhead Driver Circuits - From Shift Registers to Strobe Control |
Introductory Summary (Extended Section 5 Preview) |
In the previous section, we explored the thermal printhead itself - its resistors, its glaze, its thermistor, and its thermal behavior. But a printhead cannot work in isolation. It needs a sophisticated electronic interface to receive digital data, hold it, amplify it, and deliver precise bursts of power to the right dots at the right time. That interface is the printhead driver circuit. This chapter is dedicated entirely to the electronics that sit between the main processor and the heating elements. We will explain how print data is serialized and shifted into the head, how latches capture the data for a complete line, and how the strobe signal gates the power to the dots. We will explore the different driver topologies - from discrete shift registers with external MOSFETs to fully integrated driver ICs that combine logic and power. We will look at real-world designs from major semiconductor companies: Texas Instruments' shift register and driver combinations, STMicroelectronics' high-voltage integrated drivers, Rohm's dedicated printhead driver ICs, Allegro Microsystems' power driver arrays, and Toshiba's serial-in parallel-out driver families. We will also examine the critical timing relationships between the clock, data, latch, and strobe signals, and we will see how the driver circuitry handles the high peak currents without introducing noise or voltage droop. By the end, you will understand how a stream of bits from the CPU becomes a physical pattern of heat on the paper, and you will appreciate the careful engineering that makes this conversion happen reliably millions of times per label. |
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Chapter 1: The Data Path - From Bits to Heat |
Imagine you have a row of 832 light switches, and you want to turn on a specific pattern of them - say, a barcode pattern with black bars and white spaces. You cannot just send 832 separate wires from the CPU to the printhead; that would be impractical. Instead, you send the data as a serial stream - a single wire that carries one bit after another. A circuit called a shift register takes this serial stream and converts it into parallel outputs, one for each dot. The shift register is like a row of 832 tiny buckets. Data is poured into the first bucket, and then, with each clock pulse, the data moves one bucket to the right. After 832 clock pulses, the first bit of data has reached the last bucket, and the entire row is filled. At that moment, a latch signal captures the state of all 832 buckets and holds it. This latched data then turns on the corresponding driver transistors, and the strobe signal applies power to the selected dots. This is the fundamental data path of a thermal printer: serialize, shift, latch, and strobe. The process repeats for every line of the label, with the paper moving forward one dot pitch between each line. |
Design Example: Texas Instruments TPIC6C596 Shift Register |
The TPIC6C596 from Texas Instruments is a classic shift register with built-in power drivers. It is an 8-bit serial-in, parallel-out shift register with an output latch and open-drain power MOSFETs. Each output can sink up to 100 milliamperes at 50 volts - which is perfect for driving thermal printhead dots. In a typical printer design, 104 of these chips are cascaded to control an 832-dot head (since 104 * 8 = 832). The serial data is fed into the first chip, and its serial output goes to the next chip, forming a long chain. The clock signal is common to all chips, so all bits shift simultaneously. The latch signal is also common, so all outputs are updated at the same time. The strobe signal is separate - it is a global enable that turns on the power to the head. The TPIC6C596 is widely used because it is simple, robust, and inexpensive. It has an operating temperature range of -40C to 125C, making it suitable for industrial printers. The manufacturer's design guide recommends adding a 0.1-microfarad decoupling capacitor near each chip's power pins to reduce noise. |
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Chapter 2: The Shift Register - A Serial-to-Parallel Converter |
Let us look at the shift register in more detail. A shift register is a chain of flip-flops, each storing one bit. On each clock edge, the input bit moves into the first flip-flop, and the contents of each flip-flop move to the next one. After N clock cycles, the N bits of data are stored in the N flip-flops. The output of each flip-flop is available as a parallel output. The shift register is clocked at a high speed - typically 10 to 20 megahertz - so that a whole line of data can be shifted in within a fraction of a millisecond. For an 832-dot head at 20 megahertz, the shift time is 832 / 20,000,000 = 41.6 microseconds - which is very fast. The shift register's outputs are not used immediately; they are first latched. The latch is a separate set of flip-flops that capture the outputs of the shift register on the latch signal. This allows the next line's data to be shifted in while the current line is being printed - a pipelining technique that doubles the throughput. The latch signal is also known as the 'print enable' or 'strobe enable' because it triggers the actual printing. |
Design Example: STMicroelectronics 74HC595 in Some Printers |
Some lower-cost printers use the 74HC595 shift register, which is a standard logic chip with 8-bit serial-in, parallel-out capability and a latch. However, the 74HC595 has only 5-volt logic outputs, not power drivers. It must be followed by separate power MOSFETs or a driver array. This is a two-chip solution: the 74HC595 handles the logic, and a power driver array (like the ULN2003) handles the current. While this is cost-effective for very low-current heads, it is not suitable for high-speed industrial printers because the external MOSFETs add propagation delay and increase the PCB area. The manufacturer of a low-end desktop printer uses this two-chip solution for a 2-inch head (384 dots) and achieves a print speed of 4 inches per second. The shift register is clocked at 10 megahertz, and the latch is triggered after every 384 bits. |
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Chapter 3: The Latch - Holding the Line |
The latch is a critical component because it decouples the data shifting from the actual printing. Without a latch, the data would have to remain stable during the entire strobe pulse, which could be hundreds of microseconds. During that time, the CPU would be unable to shift the next line's data. The latch allows the CPU to shift the next line while the current line is printing. The latch signal is a pulse that captures the shift register's outputs. Once latched, the shift register can accept new data without affecting the outputs. The latch is typically a positive-edge-triggered device - the outputs update on the rising edge of the latch signal. The latch setup time - the time the data must be stable before the latch edge - is typically 10 nanoseconds, which is easily met. The hold time - the time the data must remain stable after the latch edge - is similarly short. The latch signal is generated by the CPU or the CPLD, and its timing is critical: it must occur after the last bit of the line has been shifted and before the strobe fires. |
Design Example: Latch Timing in Sato Printers |
Sato's printers use a CPLD to generate the latch signal. The CPLD counts the clock pulses and, after 832 pulses, generates a latch pulse that is 100 nanoseconds wide. The latch pulse is followed by a 1-microsecond delay before the strobe fires. This delay allows the driver transistors to fully turn on - the MOSFETs have a finite turn-on time. The manufacturer measured the latch timing with an oscilloscope and found that the data was stable for 50 nanoseconds before the latch edge and 30 nanoseconds after, which was within the specification. |
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Chapter 4: The Strobe - The Master Enable |
The strobe signal is the master enable for the printhead. It is a single signal that, when active, allows current to flow through all selected dots. The strobe is typically active low - meaning the current flows when the strobe is low. The strobe is generated by a high-power driver that can source or sink the current for all dots simultaneously. The strobe driver must be able to handle the peak current - up to 15 amperes - and must switch quickly to reduce the switching losses. The strobe is also used to control the energy: the pulse width is varied to adjust the print density. The strobe is often generated by a dedicated timer in the CPU or by a CPLD, with a resolution of a few tens of nanoseconds. The strobe signal is distributed to all the driver chips, but it must be carefully buffered to avoid timing skew - all dots must turn on and off at the same time. |
Design Example: Strobe Driver in Zebra Printers |
Zebra's high-end printers use a dedicated strobe driver IC - the MIC4104 from Microchip - which is a high-speed, high-current MOSFET driver. The MIC4104 can deliver 3 amperes of peak current and has a propagation delay of only 20 nanoseconds. It drives the gate of a large P-channel MOSFET that is in series with the 24-volt rail to the printhead. The P-channel MOSFET is a 30-volt, 30-ampere device with an on-resistance of 10 milliohms. The strobe driver is powered by a 12-volt supply, and its output swings from 0 to 12 volts, fully enhancing the P-channel MOSFET. The manufacturer measured the strobe waveform at the printhead and found it to have a rise time of 15 nanoseconds and a fall time of 20 nanoseconds - fast enough to avoid excessive switching losses. |
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Chapter 5: The Driver Transistor - The Final Gate |
Each dot has a driver transistor - a power MOSFET that connects the dot's cathode to ground. When the shift register's output is high, the MOSFET is turned on, allowing current to flow. The MOSFET must be able to handle the peak current of the dot (about 50 milliamperes) and must have a low on-resistance (Rds(on)) to minimize the voltage drop and power dissipation. The MOSFET is typically an N-channel enhancement-mode device, with a gate threshold voltage of about 2 to 4 volts. The shift register's output (at 5 volts) is sufficient to turn it on fully. The MOSFET also has a body diode that conducts in reverse if the voltage is reversed, providing some protection. The MOSFET is often integrated into the driver IC, along with the shift register and latch, to reduce the component count and the parasitic inductance. |
Design Example: Allegro A2982 Driver Array |
Allegro Microsystems' A2982 is a classic 8-channel source driver with built-in Darlington transistors. Each channel can deliver up to 500 milliamperes at 50 volts. The A2982 is used in some older printer designs, but it is not a MOSFET; it is a bipolar Darlington, which has a higher voltage drop (about 1.2 volts) and lower efficiency. Modern designs use MOSFET-based drivers like the TPIC6C596 or the integrated driver ICs from Rohm, which have a voltage drop of only 0.2 volts. The A2982 is still used in some low-cost, low-speed printers where efficiency is not a primary concern. The manufacturer of a portable label printer uses the A2982 with a 12-volt head and achieves a print speed of 3 inches per second. |
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Chapter 6: Integrated Driver ICs - The One-Chip Solution |
To save space and improve performance, many printer designs use integrated driver ICs that combine the shift register, latch, and power MOSFETs in a single package. These ICs are specifically designed for thermal printheads. They have built-in current limiting, thermal shutdown, and over-voltage protection. They also have a built-in 5-volt regulator that powers the logic from the 24-volt rail. The integrated driver IC reduces the PCB area, simplifies the layout, and improves the reliability. The only downside is that the IC must be designed for a specific current rating - if you need more current, you must use a different IC or parallel multiple outputs. |
Design Example: Rohm BH12 Series Integrated Driver |
Rohm's BH12 series is a family of integrated driver ICs for thermal printheads. The BH12 has 12 channels, each with a shift register bit, a latch, and a power MOSFET with an on-resistance of 40 milliohms. The IC can handle a maximum supply voltage of 30 volts and a maximum output current of 200 milliamperes per channel. In a design from a Taiwanese OEM, 70 BH12 ICs are cascaded to control an 832-dot head (70 * 12 = 840, with 8 unused channels). The ICs are placed along the edge of the PCB, close to the printhead connector. The manufacturer chose the BH12 because it has a built-in thermal shutdown that trips at 150C, protecting the IC and the head. The BH12 also has a built-in 5-volt regulator, so the only external supplies needed are the 24-volt rail and a 3.3-volt logic supply for the clock and data. |
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Chapter 7: The Clock Signal - The Rhythm of Data |
The clock signal is the heartbeat of the shift register. It determines the speed at which data is shifted. The clock is a square wave with a frequency between 10 and 20 megahertz. The rising edge of the clock triggers the shift operation. The clock signal must have clean edges - no ringing or overshoot - because ringing can cause false clocking of the shift register. The clock is driven by a low-impedance driver that can source and sink current quickly. The clock signal is distributed to all the driver ICs, and it must arrive at all ICs at the same time - the skew must be less than a few nanoseconds. To achieve this, the clock trace is routed as a single point-to-point chain, or as a star network with matched lengths. The clock signal is also used to clock the data out of the CPU, so the CPU must generate the data in sync with the clock. |
Design Example: Clock Distribution in a Honeywell Printer |
Honeywell's printer uses a clock distribution buffer - the 74LVC244 - to fan out the clock signal to the 104 shift register ICs. The buffer has 8 outputs, and each output drives about 13 ICs. The clock trace is routed as a star network, with all traces having the same length to within 1 millimeter. The manufacturer measured the clock skew at the ICs and found it to be less than 1 nanosecond. The clock signal also has a series termination resistor of 33 ohms at the buffer output to match the 50-ohm trace impedance, reducing reflections. The clock frequency is 15 megahertz, which gives a shift time of 55 microseconds for 832 bits. |
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Chapter 8: The Data Signal - The Serial Stream |
The data signal is the serial stream of bits that represents the print pattern. The data is generated by the CPU or the DMA controller. Each bit corresponds to one dot - a 1 means the dot is to be printed (black), and a 0 means it is to be left blank (white). The data is shifted into the shift register on the clock's rising edge. The data must be stable before the clock edge - the setup time - and must remain stable after the clock edge - the hold time. The data signal is generated by a GPIO or a SPI peripheral. The data is often scrambled or encoded to prevent long runs of 1s or 0s, which could cause thermal or power supply issues. For example, some printers use Manchester encoding or a simple inversion scheme. The data is also sometimes pre-compensated for the thermal history - a 1 might be preceded by a 1 to preheat the dot. |
Design Example: Data Generation in Brother Printers |
Brother's printer generates the data stream using a DMA channel from the CPU. The CPU prepares a line of data in the SRAM, and the DMA transfers it to a GPIO port at the clock rate. The DMA is configured to transfer 104 bytes (832 bits) per line. The data is stored in a bit-packed format - each byte has 8 bits, and the bits are arranged from the least significant bit to the most significant bit. The DMA is triggered by a timer that also generates the clock signal - this ensures the data and clock are synchronized. The manufacturer measured the data setup time and found it to be 10 nanoseconds before the clock edge, which is within the 5-nanosecond requirement of the shift register. |
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Chapter 9: The Latch Pulse - Capturing the Line |
The latch pulse is a short, positive-going pulse that captures the shift register's outputs into the latch. The latch pulse must occur after the last bit of the line has been shifted and before the strobe fires. The latch pulse is typically 100 nanoseconds wide. The latch pulse is generated by the CPU or the CPLD. The latch pulse is a critical signal - if it occurs too early, some bits will not be shifted in; if it occurs too late, the strobe will be delayed, reducing the print speed. The latch pulse is also used to reset the shift register's internal state after the latch, preparing it for the next line. The latch pulse is often combined with a 'clear' signal that resets the shift register to prevent leftover bits from the previous line. |
Design Example: Latch Generation in Sato Printers |
Sato's CPLD generates the latch pulse after counting 832 clock pulses. The latch pulse is 200 nanoseconds wide - longer than the minimum required, to ensure that all shift registers have time to capture the data. The latch pulse is followed by a 2-microsecond delay before the strobe fires. This delay allows the driver MOSFETs to turn on completely. The manufacturer found that a shorter delay (1 microsecond) caused a slight variation in the print density because the MOSFETs were not fully turned on for the first few microseconds of the strobe. |
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Chapter 10: The Strobe Pulse - The Energy Delivery |
The strobe pulse is the most critical signal in the printer. It is a pulse that, when active, applies the 24-volt rail to the printhead through the high-side switch. The strobe pulse width determines the energy delivered to each dot. The strobe pulse is generated by a timer in the CPU or the CPLD. The pulse width is variable - it can be from 100 microseconds to 1 millisecond, depending on the print speed, the head temperature, and the paper type. The strobe pulse is synchronized with the latch pulse - it fires only after the latch has captured the data. The strobe pulse is also used to control the motor - the motor steps between strobes, not during. The strobe pulse is the most power-hungry signal, and it must be handled with care to avoid noise and voltage droop. |
Design Example: Strobe Generation in Zebra Printers |
Zebra's high-end printers use a hardware timer in the CPU to generate the strobe pulse. The timer is configured in one-shot mode - it is triggered by the latch pulse and produces a pulse of a specific width. The width is calculated by the firmware based on the head temperature, the print speed, and the desired density. The timer has a resolution of 100 nanoseconds, which is sufficient for precise energy control. The timer's output is fed to the strobe driver, which drives the high-side P-channel MOSFET. The manufacturer measured the strobe pulse and found it to have a rise time of 15 nanoseconds and a fall time of 20 nanoseconds, with a pulse width accuracy of 0.5%. |
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Chapter 11: The Power Distribution - Delivering the Current |
The driver circuits need a robust power distribution network to deliver the high peak currents. The 24-volt rail is distributed to all the driver ICs, but the current is not drawn evenly - it is drawn in bursts during the strobe. The power distribution network must have low resistance and low inductance. The traces for the 24-volt rail are wide, and the ground plane is solid. The driver ICs have decoupling capacitors - 10 microfarads and 0.1 microfarads - placed close to their power pins. The decoupling capacitors provide local energy storage and reduce the high-frequency noise. The power distribution network is also designed to minimize the voltage droop - the bulk capacitor on the main board is placed close to the driver ICs. |
Design Example: Power Distribution in a Rohm Design |
Rohm's reference design for the BH12 driver IC recommends a power distribution network with a 4-layer PCB. The 24-volt rail is routed on the top layer with a width of 3 millimeters. The ground is on the bottom layer, and a 0.1-microfarad capacitor is placed near each IC's VCC pin. A 10-microfarad capacitor is placed every 10 ICs. The manufacturer measured the voltage at the farthest IC during a full-black strobe and found a droop of only 0.3 volts - well within the 1-volt tolerance of the driver IC. The manufacturer also used a separate ground return for the logic and the power, to prevent the high-current switching from affecting the logic signals. |
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Chapter 12: The Decoupling Capacitors - Noise Suppression |
Decoupling capacitors are essential for the driver circuits. They provide a local reservoir of charge that supplies the transient current, reducing the voltage droop. They also filter the high-frequency noise generated by the switching. The decoupling capacitors are placed as close as possible to the IC's power pins. The value of the decoupling capacitor is chosen based on the transient current. For a typical driver IC drawing 500 milliamperes in bursts, a 10-microfarad ceramic capacitor is used, along with a 0.1-microfarad capacitor for high-frequency noise. The capacitors are connected to the power and ground planes with short, wide traces to minimize the parasitic inductance. The decoupling capacitors are also used on the strobe driver, which draws the largest current. |
Design Example: Decoupling in Sato Printers |
Sato's printer uses a mix of ceramic and tantalum capacitors for decoupling. Each BH12 driver IC has a 0.1-microfarad ceramic capacitor placed within 2 millimeters of its VCC pin. A 10-microfarad tantalum capacitor is placed every 5 ICs. The strobe driver has a 100-microfarad electrolytic capacitor and a 0.1-microfarad ceramic capacitor. The manufacturer measured the noise on the 24-volt rail and found it to be 50 millivolts peak-to-peak - well below the 200-millivolt limit. The decoupling capacitors also improved the EMI performance by reducing the high-frequency harmonics. |
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Chapter 13: The Series Termination - Matching the Impedance |
The clock, data, latch, and strobe signals are all high-speed signals. They must be properly terminated to prevent reflections. Reflections occur when the signal reaches the end of a trace and bounces back, causing ringing and false triggering. The most common termination is a series resistor placed at the driver's output. The resistor value is chosen to match the trace impedance - typically 50 ohms. For example, a 33-ohm resistor in series with the clock signal matches a 50-ohm trace when combined with the driver's output impedance of about 17 ohms. The resistor is placed as close as possible to the driver's output. The series termination is simple and effective, but it only works if the trace is a single point-to-point connection. For a multi-drop bus (where one driver drives many loads), a parallel termination (a resistor to ground) is used. |
Design Example: Termination in Honeywell Printers |
Honeywell's printer uses series termination resistors on the clock, data, and latch signals. The resistors are 33 ohms, 1% tolerance. They are placed at the output of the CPLD. The manufacturer measured the clock signal at the farthest driver IC and found it to be clean, with a small overshoot of 5% and no ringing. The latch signal, which is more sensitive, had a series resistor of 22 ohms to reduce the overshoot further. The strobe signal, which drives a single MOSFET, did not need termination because it is a point-to-point connection. |
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Chapter 14: The Grounding - A Single Point |
The grounding scheme for the driver circuits is critical. The high-current ground (the return path for the printhead current) and the logic ground (the return path for the clock and data signals) must be separated, but they must also be connected at a single point to avoid ground loops. The separation prevents the high-current pulses from affecting the logic signals - if the logic ground is contaminated with noise, the shift register might mis-clock. The two grounds are often connected at the main power supply's output capacitor, which is the lowest impedance point. The driver ICs have separate power and logic ground pins; they should be connected to their respective planes. |
Design Example: Grounding in a Rohm Design |
Rohm's reference design uses a split ground plane: a power ground for the high-current return and a logic ground for the signals. The two planes are connected at a single point - the negative terminal of the 24-volt input capacitor. The driver ICs' power ground pins are connected to the power ground plane, and the logic ground pins are connected to the logic ground plane. The manufacturer measured the noise on the logic ground and found it to be less than 5 millivolts - well within the noise margin of the shift registers. |
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Chapter 15: The Timing Diagram - Putting It All Together |
Let us put all the signals together in a timing diagram. At the start of a line, the CPU starts shifting data. The clock pulses at a frequency of 20 megahertz, and the data changes on each clock edge. After 832 clock pulses, the data is fully shifted into the shift registers. The CPU then generates the latch pulse, which captures the data. After a short delay (1 microsecond), the CPU generates the strobe pulse, which applies power to the selected dots. The strobe pulse is held for a specific duration (e.g., 500 microseconds). During the strobe, the shift registers are not clocked, and the data is stable. After the strobe ends, the CPU steps the motor, moving the paper by one dot pitch. The cycle then repeats for the next line. The timing is critical - if the latch pulse is delayed, the strobe will be delayed, reducing the print speed. If the strobe starts before the latch, the wrong dots will be printed. |
Design Example: Timing Verification in Brother Printers |
Brother's engineers use an oscilloscope to verify the timing of the signals. They connect the clock, data, latch, and strobe signals to the scope and trigger on the latch pulse. They measure the setup time of the data before the clock edge, the hold time after the clock edge, the delay between the latch pulse and the strobe, and the strobe width. They adjust the firmware to ensure that all timings are within the specifications. The manufacturer reports that the worst-case timing margin is 100 nanoseconds - which is comfortable. |
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Chapter 16: The Daisy Chain - Cascading Multiple ICs |
The shift registers are cascaded in a daisy chain: the serial output of the first IC goes to the serial input of the second IC, and so on. The data is shifted through the entire chain. The clock is common to all ICs. The latch is also common. The daisy chain is simple and requires only a few wires - one for data, one for clock, and one for latch. However, the daisy chain can cause timing skew - the data takes time to propagate from one IC to the next. At high clock speeds, the propagation delay can become significant. The propagation delay of a typical shift register is about 10 nanoseconds. For a chain of 104 ICs, the total propagation delay is 1.04 microseconds - which is small compared to the 55-microsecond shift time. The skew is not an issue for the latch, because the latch occurs after all bits are shifted. |
Design Example: Daisy Chain in Sato Printers |
Sato's printer uses a daisy chain of 104 TPIC6C596 ICs. The clock frequency is 15 megahertz, so the shift time is 55 microseconds. The propagation delay is about 1 microsecond, which is negligible. The manufacturer did not use any clock buffers in the chain; the clock signal is distributed from the CPLD to all ICs via a single trace. The trace is routed as a daisy chain, with the clock signal entering the first IC and then going to the next, and so on. The manufacturer measured the clock skew at the ends of the chain and found it to be 2 nanoseconds - well within the specification. |
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Chapter 17: The Output Enable - A Safety Feature |
Many driver ICs have an output enable pin that, when asserted, forces all outputs to the high-impedance state, effectively turning off all dots. This is a safety feature that is used during power-up and power-down, when the logic states might be undefined. The output enable pin is controlled by the CPU. The CPU asserts the output enable only after the power rails are stable and the shift registers are initialized. The output enable is also used in emergency situations - if the over-temperature protection triggers, the CPU asserts the output enable to turn off the dots. |
Design Example: Output Enable in Zebra Printers |
Zebra's printer uses the output enable pin of the TPIC6C596 to turn off the head during power-up. The pin is controlled by a GPIO. The CPU keeps the output enable low for 100 milliseconds after power-up, allowing the power supply to stabilize. The CPU then sets the output enable high, enabling the outputs. If the head temperature exceeds 70C, the CPU sets the output enable low, turning off the dots and preventing further heating. The manufacturer tested this feature by simulating a fault - the CPU asserted the output enable within 1 microsecond of the fault detection. |
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Chapter 18: The Thermal Shutdown - Protecting the Driver |
The driver ICs themselves can overheat if they are driven at a high current for a long time. Many driver ICs have a built-in thermal shutdown that turns off the outputs if the junction temperature exceeds a threshold - typically 150C. The thermal shutdown is a last-resort protection. The IC will not automatically restart; it requires a power cycle or a reset. The thermal shutdown is independent of the CPU, so it works even if the firmware crashes. |
Design Example: Thermal Shutdown in Rohm BH12 |
The BH12 driver IC has a thermal shutdown at 150C with a hysteresis of 20C. The manufacturer tested this by running a full-black pattern at maximum speed. The IC's temperature rose to 120C, which was below the shutdown threshold. When the ambient temperature was raised to 60C (in a thermal chamber), the IC temperature reached 145C, and the thermal shutdown triggered, turning off the outputs. The printer stopped printing and displayed an error. When the ambient cooled to 25C, the IC temperature dropped to 100C, but the IC remained latched off - it required a power cycle to reset. |
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Chapter 19: The Over-Current Protection - Limiting the Current |
In addition to thermal shutdown, some driver ICs have over-current protection. If the output current exceeds a threshold (e.g., 200 milliamperes), the driver reduces the gate voltage of the MOSFET, limiting the current. This protects the driver and the head from a short circuit. The over-current protection is typically pulse-by-pulse - it limits the current on each cycle. If the over-current persists, the IC may enter a hiccup mode or latch off. The over-current protection is an added safety feature. |
Design Example: Over-Current in Texas Instruments TPIC6C596 |
The TPIC6C596 does not have built-in over-current protection; it relies on the external current limiting provided by the printhead's resistance. However, if a dot is shorted, the current could exceed the IC's rating. To prevent this, the manufacturer added a 100-ohm resistor in series with each output - this is a crude current limit. The resistor limits the current to 240 milliamperes at 24 volts, which is within the IC's 250-milliampere rating. The resistor dissipates power, but the manufacturer accepted the trade-off. |
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Chapter 20: The Logic Level Translation - 3.3V to 5V |
Most modern CPUs operate at 3.3 volts, but the shift registers and driver ICs often require 5-volt logic levels. A level translator is needed to convert the 3.3-volt signals to 5 volts. The level translator can be a dedicated IC (like the TXB0104), or it can be a simple transistor circuit. The level translator must be fast enough to handle the 20-megahertz clock. The level translator also provides isolation - it prevents the 5-volt logic from damaging the 3.3-volt CPU if a fault occurs. |
Design Example: Level Translation in Brother Printers |
Brother's printer uses the TXB0104 level translator from Texas Instruments. The translator has 4 channels, one for clock, data, latch, and strobe. The translator is powered by 3.3 volts on the CPU side and 5 volts on the driver side. The translator has built-in automatic direction sensing, so it is bidirectional. The manufacturer measured the propagation delay of the translator and found it to be 5 nanoseconds - fast enough for the 20-megahertz clock. The translator also has ESD protection, which protects the CPU from any ESD events on the FFC cable. |
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Chapter 21: The FFC Cable - The Connection to the Head |
The driver circuits are on the main PCB, but the printhead is on a separate flexible PCB that is connected to the main board via a flexible flat cable (FFC). The FFC carries the 24-volt power, the ground, the clock, data, latch, strobe, thermistor, and ID resistor signals. The FFC must be flexible and durable, and it must not introduce excessive resistance or inductance. The FFC is typically made of polyimide with copper traces, and it has a pitch of 0.5 to 1 millimeter. The FFC is connected to the main board with a ZIF connector. The FFC must be routed away from noise sources to avoid signal degradation. |
Design Example: FFC in Sato Printers |
Sato's printer uses a 40-pin FFC with a pitch of 0.5 millimeters. The FFC is 20 centimeters long, and it is folded inside the printer to allow the cover to open. The FFC carries the 24-volt power on 8 pins and ground on 8 pins. The clock, data, latch, and strobe signals are on separate pins, with a ground pin between each signal to reduce crosstalk. The FFC is rated for 1,000 flex cycles, which is sufficient for the printer's lifetime. |
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Chapter 22: The FFC Connector - The Interface |
The ZIF connector on the main board is a zero-insertion-force connector that clamps the FFC in place. The connector has a metal spring that applies pressure to the contacts. The connector is fragile, and it must be handled carefully. The connector's contacts are gold-plated to resist corrosion. The connector is soldered to the PCB, and it must be placed near the edge of the board for easy access. |
Design Example: Connector in Honeywell Printers |
Honeywell's printer uses a Hirose FH12 series ZIF connector with a pitch of 0.5 millimeters. The connector has a built-in lock that holds the FFC in place. The connector is rated for 50 insertion cycles, which is typical for a serviceable part. The manufacturer recommends that the FFC be inserted only when the power is off, to prevent accidental shorting. |
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Chapter 23: The ESD Protection - Shielding the Inputs |
The FFC cable can act as an antenna, picking up electrostatic discharge (ESD) from the environment. The signals on the FFC - clock, data, latch, and strobe - must be protected from ESD. TVS diodes are placed on each signal line, clamping the voltage to a safe level. The TVS diodes are typically 5-volt devices with a capacitance of a few picofarads - the low capacitance is important to avoid degrading the signal edges. The TVS diodes are placed near the connector on the main board. |
Design Example: ESD Protection in Brother Printers |
Brother's printer uses a TVS diode array - the PESD5V0S1UB - on the FFC signals. The array has 4 channels, one for each signal. The TVS diode clamps the voltage to 6 volts, which is safe for the 5-volt logic. The TVS diode has a capacitance of 2 picofarads, which does not affect the 20-megahertz clock. The manufacturer tested the ESD protection by applying a 15-kilovolt air discharge to the connector, and the printer survived without any damage. |
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Chapter 24: The Power-on Reset - Initializing the Drivers |
When the printer is powered on, the driver ICs must be initialized. The shift registers should be cleared, and the latches should be reset. The CPU performs this initialization by sending a sequence of clock pulses while the data is held low, shifting zeros into all registers. The CPU then asserts the latch, ensuring that all outputs are off. The CPU also asserts the output enable pin to turn off the drivers. After the initialization, the printer is ready to receive data. |
Design Example: Initialization in Zebra Printers |
Zebra's printer performs a power-on reset sequence. The CPU sends 832 clock pulses with data held low, shifting zeros into all 104 shift registers. The CPU then asserts the latch, capturing the zeros. The CPU then sets the output enable pin high, enabling the outputs. The CPU then reads the ID resistor and the thermistor to configure the printing parameters. |
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Chapter 25: The Data Inversion - A Simple Trick |
Sometimes, the data is inverted - a 1 means the dot is off, and a 0 means it is on. This is done to accommodate different driver ICs that have active-low outputs, or to simplify the logic. The data inversion can be done in software by XORing the data with a mask, or in hardware by using an inverter. The inversion is typically done in the CPU before the data is sent to the shift register. |
Design Example: Data Inversion in Sato Printers |
Sato's printer uses the BH12 driver IC, which has active-high outputs. However, the CPU generates the data with a 1 meaning 'on.' No inversion is needed. In another design, a printer used the TPIC6C596, which has active-low outputs (the outputs are open-drain and sink current). In that design, the CPU inverted the data before sending it - a 1 in the CPU became a 0 at the output. The inversion was done in software, using a simple XOR. |
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Chapter 26: The Test Pattern - A Diagnostic Tool |
Most printers have a test pattern that can be printed to diagnose problems with the driver circuits. The test pattern includes all dots at different densities, a checkerboard, and a series of lines. The test pattern also includes a barcode that can be read by a scanner to verify the print quality. The test pattern is useful for identifying missing dots, uneven density, or alignment issues. |
Design Example: Test Pattern in Honeywell Printers |
Honeywell's printer has a built-in test pattern that is activated by pressing a button combination. The test pattern prints a series of lines, a checkerboard, and a barcode. The user can inspect the pattern to check for any problems. The test pattern also includes a head resistance measurement and a temperature reading. |
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Chapter 27: The Duty Cycle - Managing the Heat |
The driver circuits are not fired continuously; they are fired in bursts. The duty cycle is the ratio of the strobe time to the total line time. The duty cycle is typically 10% to 30%. The duty cycle limits the average power and prevents the driver ICs from overheating. If the duty cycle is too high, the driver ICs will overheat, and the thermal shutdown will trip. The duty cycle is controlled by the print speed - a higher speed gives a shorter line time and a higher duty cycle. The duty cycle is also controlled by the strobe width - a wider strobe gives a higher duty cycle. |
Design Example: Duty Cycle in Brother Printers |
Brother's printer has a maximum duty cycle of 30%. At 30% duty cycle, the driver ICs are at their thermal limit. If the printer is operated at a higher duty cycle, the thermal shutdown will trip. The manufacturer uses a thermal model in the firmware to estimate the duty cycle and to reduce the print speed if the duty cycle is too high. |
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Chapter 28: The Capacitive Load - A Hidden Problem |
The outputs of the driver ICs drive the capacitive load of the printhead's traces and the MOSFET gates. The capacitive load slows down the rise and fall times of the outputs, increasing the switching losses. The capacitive load can also cause ringing if the inductance and capacitance resonate. The capacitive load is minimized by using short, wide traces and by placing the driver ICs close to the printhead. The capacitive load is also reduced by using MOSFETs with low input capacitance. |
Design Example: Capacitive Load in Zebra Printers |
Zebra's printer uses a low-capacitance MOSFET (e.g., the BSS84) to reduce the capacitive load. The MOSFET has an input capacitance of 10 picofarads, which is much lower than the 50 picofarads of a standard MOSFET. The low capacitance reduces the switching losses and improves the rise time. The manufacturer measured the output rise time and found it to be 20 nanoseconds, which is fast enough for the 20-megahertz clock. |
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Chapter 29: The Signal Integrity - Maintaining Clean Signals |
Signal integrity is the art of keeping the digital signals clean and free from noise, ringing, and reflections. The signal integrity of the clock, data, latch, and strobe signals is critical for reliable printing. The signal integrity is maintained by careful PCB layout, proper termination, and decoupling. The signal integrity is also affected by the impedance of the traces, which must be controlled to 50 ohms. |
Design Example: Signal Integrity in Sato Printers |
Sato's printer uses a 4-layer PCB with controlled impedance traces. The clock, data, latch, and strobe traces are 50-ohm microstrip lines. The manufacturer used a TDR (time-domain reflectometer) to measure the impedance of the traces and found it to be 50 ohms within 5%. The signal integrity was verified using an oscilloscope with a high-bandwidth probe. |
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Chapter 30: The Glitch - A Brief, Unwanted Pulse |
A glitch is a brief, unwanted pulse on a signal that can cause a false trigger. Glitches can be caused by crosstalk from other signals, by reflections, or by power supply noise. The glitch is particularly dangerous on the clock and latch signals because it can cause a false shift or a false latch. The glitch is minimized by routing the sensitive signals away from noise sources and by using proper termination. The glitch is also filtered by the input hysteresis of the shift register, which ignores small pulses. |
Design Example: Glitch Filtering in Honeywell Printers |
Honeywell's printer uses a small RC filter on the latch signal - a 100-ohm resistor and a 100-picofarad capacitor - to filter out glitches. The filter has a time constant of 10 nanoseconds, which is small enough to not affect the latch signal's rise time. The manufacturer measured the latch signal with and without the filter and found that the filter reduced the glitch amplitude from 1 volt to 0.2 volts, which was below the logic threshold. |
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Chapter 31: The Propagation Delay - The Time to Travel |
The propagation delay is the time it takes for a signal to travel from the driver to the load. The propagation delay is caused by the finite speed of the signal on the trace and by the delays of the logic gates. The propagation delay is not a problem for the clock and data signals, because they are synchronized. However, the propagation delay between the latch and the strobe can be a problem - if the strobe fires before the latch has propagated to the farthest IC, some dots will be wrong. To compensate, the CPU inserts a delay between the latch pulse and the strobe pulse. |
Design Example: Propagation Delay in Brother Printers |
Brother's printer has a propagation delay of 100 nanoseconds from the latch to the farthest IC. The CPU inserts a 200-nanosecond delay between the latch and the strobe to ensure that all ICs have latched the data. The manufacturer measured the latch-to-strobe delay with an oscilloscope and found it to be 200 nanoseconds, which gave a comfortable margin. |
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Chapter 32: The Clock Skew - The Enemy of Synchrony |
Clock skew is the difference in the arrival times of the clock signal at different ICs. The clock skew can cause the data to be shifted incorrectly - if the clock arrives earlier at one IC than at another, the data will be shifted at different times. The clock skew is minimized by routing the clock signal with matched trace lengths and by using a low-skew buffer. |
Design Example: Clock Skew in Zebra Printers |
Zebra's printer uses a clock distribution buffer with a skew of 50 picoseconds. The clock traces are all the same length within 1 millimeter. The manufacturer measured the clock skew at the ICs and found it to be less than 100 picoseconds, which is negligible. |
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Chapter 33: The Power Dissipation - Keeping the Drivers Cool |
The driver ICs dissipate power in the form of heat. The heat is generated by the on-resistance of the MOSFETs and by the switching losses. The power dissipation is calculated as the product of the current and the voltage drop. For a typical driver IC, the power dissipation is about 0.5 watts. The IC is cooled by the PCB's copper area and by convection. The thermal management of the driver ICs is important - if they overheat, the thermal shutdown will trip. |
Design Example: Thermal Management in Rohm BH12 |
Rohm's BH12 driver IC has a thermal pad on the bottom of the package. The thermal pad is soldered to a copper area on the PCB, which acts as a heat sink. The copper area is 2 square centimeters, and it is connected to the internal ground plane with vias. The manufacturer measured the IC's temperature and found it to be 85C at an ambient of 25C, which is within the 125C maximum. |
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Chapter 34: The Daisy Chain Return - A Ground Loop Risk |
The daisy chain of shift registers can create a ground loop if the ground returns are not properly connected. A ground loop occurs when there are multiple paths for the ground current, creating a voltage difference that can cause noise. The ground loop is avoided by using a single-point ground - all ICs are connected to a single ground plane at a single point. The daisy chain of the shift registers does not create a ground loop because the ground is a solid plane. |
Design Example: Grounding in Sato Printers |
Sato's printer uses a solid ground plane that spans the entire PCB. The ground plane provides a low-impedance return path for all signals. The manufacturer used a single-point ground by connecting all ICs' ground pins to the ground plane with vias. The ground plane also acts as a heat sink for the driver ICs. |
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Chapter 35: The Level Shifting for Strobe - A Special Case |
The strobe signal is a high-voltage signal (24 volts), but the driver ICs often require a logic-level signal (5 volts) for the strobe enable. The strobe is generated by the CPU as a 3.3-volt signal, which is then level-shifted to 5 volts and then used to drive the high-side switch. The level shifting for the strobe is similar to the level shifting for the clock and data. However, the strobe signal must be propagated through the FFC, which can add noise, so the strobe is often buffered on the main board. |
Design Example: Strobe Buffering in Brother Printers |
Brother's printer uses a 74LVC244 buffer to buffer the strobe signal. The buffer is powered by 5 volts, and it converts the 3.3-volt strobe to 5 volts. The buffer also isolates the CPU from the FFC, protecting the CPU from any noise on the FFC. |
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Chapter 36: The Printhead Connector's Contact Resistance - A Hidden Loss |
The FFC connector has contact resistance - the resistance at the junction between the connector's pins and the FFC's contacts. The contact resistance is typically 50 milliohms per pin. For the power pins, which are paralleled, the total resistance is 50 / 8 = 6.25 milliohms. This resistance causes a voltage drop of 6.25 milliohms * 15 amperes = 94 millivolts, which is acceptable. For the signal pins, the contact resistance is negligible because the current is small. The contact resistance is a concern because it can increase over time due to oxidation or contamination. |
Design Example: Contact Resistance in Honeywell Printers |
Honeywell's printer uses gold-plated contacts to minimize the contact resistance. The manufacturer measured the contact resistance of the FFC connector after 1,000 insertions and found it to increase from 50 to 60 milliohms - an acceptable increase. The manufacturer also recommends cleaning the connector contacts with isopropyl alcohol if the printer is used in a dusty environment. |
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Chapter 37: The Future of Driver Circuits - Integration and Miniaturization |
The trend in driver circuits is towards higher integration and smaller size. The shift registers, latches, and power MOSFETs are increasingly integrated into a single IC, reducing the PCB area and the number of components. The driver ICs are also becoming smarter, with built-in diagnostics and communication. The future might see the driver ICs integrated with the printhead itself, creating a 'smart printhead' that contains all the electronics. This would simplify the printer's main board and allow for higher resolutions. |
Design Example: Smart Printhead from Alps Electric |
Alps Electric has developed a smart printhead that includes the driver ICs, the thermistor, and the ID resistor on the same flexible PCB as the heating elements. The smart printhead communicates with the printer via a simple SPI interface, sending and receiving data. The smart printhead eliminates the need for a separate driver board, reducing the cost and the size. The manufacturer of a portable label printer uses this smart printhead to achieve a print speed of 6 inches per second at 300 dpi. |
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Chapter 38: The System Integration - From Bits to Barcodes |
We have now covered every aspect of the printhead driver circuit. Let us put it all together. The CPU generates a stream of bits that represent the print pattern. The DMA transfers these bits to the shift registers at the clock rate. The latch captures the bits after each line. The strobe applies power to the selected dots. The driver transistors conduct the current to the ground. The printhead heats up and transfers the heat to the paper. The motor steps the paper, and the cycle repeats. This is the complete data path from the CPU to the paper. The driver circuit is the crucial interface that converts the digital world into the physical world. |
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Detailed Summary - Tying It All Together |
We have now completed a comprehensive tour of the printhead driver circuits - the electronic bridge between the printer's digital brain and the thermal head's heating elements. We began with the fundamental data path: serializing the print data, shifting it into a chain of shift registers, latching it, and then applying a strobe pulse to fire the selected dots. We saw how shift registers like the TPIC6C596 convert a serial stream into parallel outputs, and how the latch decouples the shifting from the printing, enabling high-speed operation. |
We explored the different driver topologies, from discrete shift registers with external MOSFETs to fully integrated driver ICs from Rohm, Allegro, and Texas Instruments. We examined the critical timing signals - clock, data, latch, and strobe - and saw how their precise relationships determine the print quality. We looked at the high-current strobe driver that delivers up to 15 amperes to the printhead, and we saw how the power distribution network with decoupling capacitors and wide traces keeps the voltage stable. |
We delved into the practical aspects: the daisy chain that cascades multiple ICs, the level translation between 3.3-volt CPUs and 5-volt drivers, the FFC cable and its connector, and the ESD protection that shields the sensitive inputs. We examined the thermal management of the driver ICs, the grounding scheme that separates power and logic grounds, and the signal integrity techniques that prevent reflections and glitches. |
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We looked at the diagnostic tools - the test pattern that verifies the driver circuits, the duty cycle that limits the average power, and the thermal shutdown that protects the ICs from overheating. We saw how the propagation delay and clock skew are managed, and how the contact resistance of the connector is minimized. |
We discussed the future trends: the integration of all driver electronics into a single smart printhead, the use of MEMS technology for higher resolutions, and the trend towards smaller, more efficient drivers. The overarching lesson is that the driver circuit is a complete system in itself, with its own power supply, timing constraints, and thermal management. It is not just a bunch of shift registers; it is a carefully orchestrated ensemble of components that must work together with microsecond precision. A poorly designed driver circuit will produce faint, uneven, or missing dots, making the barcode unreadable. A well-designed driver circuit, on the other hand, will produce crisp, clear, and consistent prints for hundreds of thousands of labels. Understanding the driver circuit is essential for any engineer who wants to design a reliable thermal printer, and this chapter has provided that understanding from the ground up. |
End of Extended Section 5 |
cs@easiersoft.com